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Research / Sega's SVP Chip / Electrical characteristics
Absolute Maximum Ratings
| Characteristics | Symbol | Value | Unit |
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| VDD to VSS | VDD | 0.7 | V | | Input voltage | VI | VDD + 0.5 to - 0.5 | V | | Output voltage | VO | VDD + 0.5 to - 0.5 | V | | Storage temperature | TSTG | -65 to +150 | oC | | Lead temperature (soldering) | TL | Less than 300 | oC |
DC Characteristics
| Characteristics | Symbol | Condition | Min | Typ | Max | Unit |
|---|
| Operating current | IDD | CK = 25 MHz | | 40 | | mA | | Input voltage high | VIH | | 0.9VDD | | | V | | Input voltage low | VIL | | | | 0.1VDD | V | | Input leakage current | II | | | 1 | | µA | | Output voltage high | VOH | IOH = -100 µA | VDD=0.2 | | | V | | Output voltage low | VOL | IOL = 0.5 mA | | | 0.5 | V | Output current in high impedance stage | IOZ | | | | 5 | µA |
AC Characteristics
| AC Characteristics | Symbol | Min | Typ | Max | Unit |
|---|
| Clock cycle time | TCY | 1000 | 40 | | ns | | Clock pulse width | PWW | 16 | | | | EA, R/WB delay from CK1 | EAD | | 8 | | | EXT pre-charge delay from CK1 | T1P | | 10 | | | EXT floating delay from CK1 | T1F | | 10 | | | EXT data output delay from CK1 | TRD | | 14 | | | EXT data output hold from CK1 | TXH | 6 | | | | EXT data input setup time | TXRS | 4 | | | | EXT data input hold time | TXRH | 6 | | | | ESB delay time | TEWRD | | 6 | | | PA delay from CK1 | TPAD | | 6 | | | PD input setup time | TPDS | | 4 | | | PD input hold time | TPDH | 6 | | | | SS setup time | TCTLS | 2.5 | | | | SS hold time | TCTLH | 6 | | |
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